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1997 microchip technology inc. ds00546e-page 1 m introduction this application note is intended for pic16c7x users with some degree of familiarity with analog system design. the various sections discuss the following topics: commonly used a/d terminology how to con?ure and use the pic16c71 a/d various ways to generate external reference voltage (v ref ) con?uring the ra3:ra0 pins commonly used a/d terminology the ideal transfer function in an a/d converter, an analog voltage is mapped into an n-bit digital value. this mapping function is de?ed as the transfer function. an ideal transfer is one in which there are no errors or non-linearity. it describes the ?deal or intended behavior of the a/d. figure 1 shows the ideal transfer function for the pic16c7x a/d. figure 1: pic16c7x ideal transfer function authors: sumit mitra, stan d?ouza, and russ cooper microchip technology inc. analog input voltage ffh feh digital code output code width (cw) 04h 03h 02h 01h 00h 0.5lsb 1lsb 2lsb 3lsb 4lsb 255lsb 256lsb (full scale) note that the digital output value is 00h for the analog input voltage range of 0 to 1lsb. in some converters, the ?st transition point is at 0.5lsb and not at 1lsb as shown in figure 2. either way, by knowing the transfer function the user can appropriately interpret the data. transition point the analog input voltage at which the digital output switches from one code to the next is called the ?ran- sition point. the transition point is typically not a single threshold, but rather a small region of uncertainty (figure 3). the transition point is therefore de?ed as the statistical average of many conversions. stated dif- ferently, it is the voltage input at which the uncertainty of the conversion is 50%. code width the distance (voltage differential) between two transition points is called the ?ode width. ideally the code width should be 1lsb (figure 1). AN546 using the analog-to-digital (a/d) converter figure 2: alternate transfer function analog input voltage ffh feh digital code output 04h 03h 02h 01h 00h 0.5lsb 1lsb 2lsb 3lsb 4lsb 255lsb 256lsb (full scale)
AN546 ds00546e -page 2 1997 microchip technology inc. center of code width the midpoint betw een tw o tr ansition points is called the ?enter of code width ( figure 3 ). figure 3: t ransition p oints diff erential non-linearity (dnl) it is the de viation in code-width from 1lsb ( figure 4 ). the diff erence is calculated f or each and e v er y tr ansition. the largest diff erence is repor ted as dnl. it is impor tant to note that the dnl is measured after the tr ansf er function is nor maliz ed to match offset error and gain error . note that the dnl cannot be an y less than -1lsb . in the other direction, dnl can be >1lsb . figure 4: diff erential non-linearity digital output 7 6 5 4 3 2 1 0 code under test 100% 0% center of code width lo w side tr ansition t r ansition points 50% 7 6 5 4 3 2 1 0 digital output dnl = 1/4 lsb dnl = +3/4 lsb ideal tr ansf er function (f or ref erence only) actual tr ansf er function dnl = -1/4lsb to +3/4lsb absolute err or the maxim um de viation betw een an y tr ansition point from the corresponding ideal tr ansf er function is de ned as the absolute error . this is ho w it is measured and repor ted in the pic16c7x ( figure 5 ). the notab le diff erence betw een absolute error and integ r al non-lin- ear ity (inl) is that the measured data is not nor maliz ed f or full scale and offset errors in absolute error . absolute error is probab ly the rst par ameter the user will re vie w to e v aluate an a/d . sometimes absolute error is repor ted as the sum of offset, full-scale and integ r al non-linear ity errors . t otal unadjusted err or t otal unadjusted error is the same as absolute error . again, sometimes it is repor ted as the sum of offset, full-scale and integ r al non-linear ity errors . no missing code no missing code implies that as the analog input v olt- age is g r adually increased from z ero to full scale (or vice v ersa), all digital codes are produced. stated otherwise , changing analog input v oltage from one quantum of the analog r ange to the ne xt adjacent r ange will not produce a change in the digital output b y more than one code count. monotonic monotonicity guar antees that an increase (or decrease) in the analog input v alue will result in an equal or g reater digital code (or less). monotonicity does not guar antee that there are no missing codes . ho w e v er , it is an impor tant cr iter ion f or f eedbac k control systems . non-monotonicity ma y cause oscillations in such sys- tems . the rst der iv ativ e of a monotonic function alw a ys has the same sign. figure 5: absolute err or 7 6 5 4 3 2 1 0 digital output absolute err or = +3/4lsb error = 3/4lsb actual tr ansf er function ideal tr ansf er function error = 1/4lsb error = 1/4lsb
1997 microchip technology inc. ds00546e -page 3 AN546 ratiometric con ver sion ratiometr ic con v ersion is the a/d con v ersion process in which the binar y result is a r atio of the supply v oltage or ref erence v oltage , the latter being equal to full-scale v alue b y def ault. the pic16c7x is a r atiometr ic a/d con v er ter where the result depends on v dd or v ref . in some a/ds , an absolute ref erence is pro vided result- ing in ?bsolute con v ersion? sample and hold in sample and hold type a/d con v er ters , the analog input has a s witch (typically a fet s witch in cmos) which is opened f or a shor t dur ation to capture the analog input v oltage onto an on-chip capacitor . con v ersion is typically star ted after the sampling s witch is closed. t rac k and hold t r ac k and hold is basically the same as sample and hold, e xcept the sampling s witch is typically left on. theref ore the v oltage on the on-chip holding capacitor ?r ac ks the analog input v oltage . t o begin a con v ersion, the sampling s witch is closed. the pic16c7x a/d f alls in this categor y . sampling time sampling time is the time required to charge the on-chip holding capacitor to the same v alue as is on the analog input pin. the sampling time depends on the magnitude of the holding capacitor and the source impedance of the analog v oltage input. offset err or (or zer o err or) offset error is the diff erence betw een the rst actual (measured) tr ansition point and the rst ideal tr ansition point as sho wn in figure 6 . it can be corrected (b y the user) b y subtr acting the offset error from each con v er- sion result. figure 6: offset err or 7 6 5 4 3 2 1 0 digital output actual tr ansf er function ideal tr ansf er function offset err or full scale err or (or gain err or) full scale error is the diff erence betw een the ideal full scale and the actual (measured) full scale r ange ( figure 7 ). it is also called gain error , because the error changes the slope of the ideal tr ansf er function creating a gain f actor . it can be corrected (b y the user) b y m ulti- plying each con v ersion result b y the in v erse of the gain. figure 7: full scale err or integral non-linearity (inl), or relative err or the de viation of a tr ansition point from its corresponding point on the ideal tr ansf er cur v e is called ?nteg r al non-linear ity ( figure 8 ). the maxim um dif- f erence is repor ted as the inl of the con v er ter . it is impor tant to note that full scale error and the offset error are nor maliz ed to match end tr ansition points bef ore measur ing the inl. figure 8: integral non-linearity ffh feh fdh fch 02h 00h actual tr ansf er function ideal tr ansf er function digital output actual full-scale rang e ideal full-scale rang e 01h 03h fsr 7 6 5 4 3 2 1 0 digital output de viation = +3/4lsb actual tr ansf er function ideal tr ansf er function de viation = +1/4lsb de viation = -11/4lsb inl in this e xample is -1/4lsb to +3/4lsb
AN546 ds00546e -page 4 1997 microchip technology inc. ho w t o use the pic16c71 a/d the a/d in the pic16c71 is easy to set up and use . there are a f e w consider ations: 1. select either v dd or v ref as ref erence v oltage . (more on using v ref input later) select a/d con v ersion cloc k ( t ad ): 2 t osc , 8 t osc , t osc or t rc (inter nal rc cloc k). f or the rst three options , mak e sure that t ad 3 2.0 m s . if deter min- istic con v ersion time is required, select t osc time-base . if con v ersion dur ing sleep is required, select t rc . 2. channel selection: if only one a/d channel is required, prog r am the adcon1 register to 03h. this con gures the a/d pins as digital i/o . if m ultiple channels are required, pr ior to each con v ersion the ne w channel m ust be selected. 3. sampling and con v ersion: after a ne w channel is selected, a minim um amount of sampling time m ust be allo w ed bef ore the go/ done bit in adcon0 is set to begin con v ersion. once con v ersion begins , it is ok to select the ne xt channel, b ut sampling does not begin until current con ver sion is complete . theref ore , it is alw a ys necessar y to ensure the minim um sampling time is pro vided f or : i) after a con v ersion ii) after a ne w channel is selected iii) after a/d is tur ned on (bit adon = 1) 4. reading result: completion of a con v ersion can be deter mined b y polling the go/ done bit (cleared), or polling ag bit adif (set), or w aiting f or an adif interr upt. ad ditional tips: a) do not set bits go/ done and adon in the same instr uction. first, tur n the a/d is on b y set- ting bit adon. then allo w at least 5 m s bef ore con v ersion begins (setting the go/ done bit), longer if sampling time requirement is not met within 5 m s . b) abor ting a con v ersion: a con v ersion can be abor ted b y clear ing bit go/ done . the a/d con v er ter will stop con v ersion and re v er t bac k to sampling state . c) using the adres register as a nor mal register : the a/d only wr ites to the adres register at the end of a con v ersion. theref ore , it is possib le to use the adres register as a nor mal le register betw een con v ersions and when a/d is off . the f ollo wing f our e xamples pro vide sample code on using the a/d module . example 1: ho w to do a sample a/d con ver sion ; ; initializead, initializes and sets up the a/d hardware. ; always ch2, internal rc osc. initializead bsf status, 5 ; select bank1 movlw b'00000000' ; select ra3-ra0 movwf adcon1 ; as analog inputs bcf status, 5 ; select bank0 movlw b'11010001' ; select: rc osc, ch2... movwf adcon0 ; turn on a/d convert call sample-delay ; provide necessary sampling time ; bsf adcon0, 2 ; start new a/d conversion loop btfsc adcon0, 2 ; a/d over? goto loop ; no then loop ; movf adres, w ; yes then get a/d value ; a detailed code listing is pro vided in appendix a.
1997 microchip technology inc. ds00546e -page 5 AN546 example 2: sequential c hannel con ver sions ; ; initializead, initializes and sets up the a/d hardware. ; select ch0 to ch3 in a round robin fashion, internal rc osc. ; load results in 4 consecutive addresses starting at adtable (10h) ; initializead bsf status, rp0 ; select bank1 movlw b'00000000' ; select ra3-ra0 movwf adcon1 ; as analog inputs bcf status, rp0 ; select bank0 movlw b'11000001' ; select: rc osc, ch0... movwf adcon0 ; turn on a/d movlw adtable ; point fsr to top of... movwf fsr ; table ; new_ad call sample_delay ; provide necessary sampling time bsf adcon0, go ; start new a/d conversion loop btfsc adcon0, go ; a/d over? goto loop ; no then loop ; movf adres, w ; yes then get a/d value movwf 0 ; load indirectly movlw 4 ; select next channel addwf adcon0 ; / bcf adcon0, adif ; reset interrupt flag bit. ; increment pointer to correct table offset. clrf temp ; clear temp register btfsc adcon0, ch50 ; test lsb of channel select bsf temp, 0 ; set if ch1 selected btfsc adcon0, ch51 ; test msb of channel select bsf temp, 1 ; / movlw adtable ; get table address addwf temp, w ; add with temp movwf fsr ; move into indirect goto new_ad ; a detailed code listing is pro vided in appendix b .
AN546 ds00546e -page 6 1997 microchip technology inc. example 3: sample interrupt handler f or the a/d org 0x00 goto start org 0x04 goto service_ad ; interrupt vector ; ; org 0x10 start movlw b'00000000' ;init i/o ports movwf port_b tris port_b ; call initializead update bcf flag, adover ; reset software a/d flag call setupdelay ; setup delay >= 10us. bcf adcon0, adif ; reset a/d int flag (adif bsf adcon0, go ; start new a/d conversion bsf intcon, gie ; enable global interrupt loop btfsc flag, adover ; a/d over? goto update ; yes start new conv. goto loop ; no then keep checking ; initializead, initializes and sets up the a/d hardware. ; select ch0 to ch3, rc osc., a/d interrupt. initializead bsf status, rp0 ; select bank1 movlw b'00000000' ; select ra0-ra3... movwf adcon1 ; as analog inputs bcf status, rp0 ; select bank0 clrf intcon ; clr all interrupts bsf intcon, adie ; enable a/d int. movlw b'11010001' ; select: rc osc, ch2... movwf adcon0 ; turn on a/d return ; service_ad btfss adcon0, adif ; a/d interrupt? retfie ; no then ignore movf adres, w ; get a/d value return ; do not enable int ; a detailed code listing is pro vided in appendix c .
1997 microchip technology inc. ds00546e -page 7 AN546 example 4: con ver sions during sleep mode ; ; initializead, initializes and sets up the a/d hardware. ; select ch0 to ch3, internal rc osc. ; while doing the conversion put unit to sleep. this will ; minimize digital noise interference. ; note that a/d's rc osc. has to be selected in this instance. ; initializead bsf status, rp0 ; select bank1 movlw b'00000000' ; select ra0-ra3... movwf adcon1 ; as analog inputs bcf status, rp0 ; select bank0 movlw b'11000001' ; select: rc osc, ch0... movwf adcon0 ; turn on a/d & adie movlw adtable ; point fsr to top of... movwf fsr ; table ; new_ad bsf adcon0, go ; start new a/d conversion sleep ; goto sleep ; when a/d is over program will continue from here ; movf adres, w ; get a/d value ; a detailed code listing is pro vided in appendix d .
AN546 ds00546e -page 8 1997 microchip technology inc. using external ref erence v olta g e when using the e xter nal ref erence v oltage , k eep in mind that an y analog input v oltage m ust not e xceed v ref . an ine xpensiv e w a y to gener ate v ref is b y emplo ying a z ener diode ( figure 9 ). most common z ener diodes off er 5% accur acy . re v erse bias current ma y be as lo w as 10 m a. ho w e v er , larger currents (1 ma - 20 ma) are recommended f or stability , as w ell as lo w er impedance of the v ref source . figure 9: lo w cost v olta g e ref erence po wer mana gement in using v ref in po w er sensitiv e applications , the user ma y tur n on a v ref gener ator using another i/o pin ( figure 10 ). dr iv e a '1' on pin rb1, in this e xample , when using the a/d . dr iv e a '0' on pin rb1 when not using the a/d con v er ter . note that this w a y rb1 is not oating. ev en if v ref deca ys to some inter mediate v oltage , it will not cause the input b uff er on rb1 to dr a w current. alter nately , use ra0, ra1 or ra2 pin to supply the current instead of rb1. con gure the ra pin as analog (this will tur n off its input b uff er). then use it as a digital output ( figure 11 ). c r v dd v ref pic16c71 c = 0.01 to 0.1 m f figure 10: p o wer -sensitive applications #1 zener s and ref erence generator s finally , v ar ious ref erence v oltage gener ator chips (typically using on-chip band-gap ref erence) are a v ailab le . the y are more accur ate . t ab le 1: z ener s and ref erence g enerator s zener s v z t olerance 1n746 3.3v 5% 1n747 3.6v 5% 1n748 3.9v 5% 1n749 4.3v 5% 1n750 4.7v 5% 1n751 5.1v 5% 1n752 5.6v 5% v olta g e ref erence v ref t olerance ad580 (maxim) 2.5v 3% to 0.4% lm385 2.5v 1.5% lm1004 2.5v 1.2% l t1009 (lin. t ech.) 2.5v 0.2% l t1019 (lin. t ech.) 5.0v 0.2% l t1021 (lin. t ech.) 5.0v 0.05% to 1% l t1029 (lin. t ech.) 5.0v 0.2% to 1% r rb1 v ref /ra3 pic16c71 d c
1997 microchip technology inc. ds00546e -page 9 AN546 v ref impedance and current suppl y requirements ideally , v ref should ha v e as lo w a source impedance as possib le . ref err ing to figure 9 , v ref source impedence ? r. ho w e v er , smaller r increases current consumption. since v ref is used to charge capacitor arr a ys inside the a/d con v er ter and the holding capacitor , chold ? 51 pf , the f ollo wing guideline should be met: t ad = con v ersion clock. f or t ad = 2 m s and for c hold = 50 pf , v ref ? 50 w . f or v ref impedance higher than this , the con v ersion cloc k ( t ad ) should be increased appropr iately . figure 11: po wer -sensitive applications #2 t ab le 2 giv es e xamples of the maxim um r ate of con v ersion per bit, relating to the v oltage ref erence impedance . t ab le 2: maxim um rate of con ver sion / bit r vref t ad (max) 1k 2.29 m s 5k 3.52 m s 10k 5.056 m s 50k 16.66 m s 100k 32.70 m s assumes no e xter nal capacitors t a d 6 1 k r + ( ) 51.2 p f 1.677 m s + = ra0 v ref /ra3 pic16c71 r c t o achie v e a lo w source impedance when using a zener diode , a v oltage f ollo w er circuit is recommended. this is sho wn in figure 12 . figure 12: v olta g e follo wer cir cuit configuring p or ta inputs as analog or digital t w o bits in the adcon1 register , pcfg1 and pcfg0, control ho w pins ra3:ra0 are con gured. when an y of these pins are selected as analog: the digital input b uff er is tur ned off to sa v e current ( figure 13 ). reading the por t will read this pin as '0'. the tris bit still controls the output b uff er on this pin. so , nor mally the tris bit will be set (input). ho w e v er , if the tris bit is cleared, then the pin will output whate v er is in the data latch. when an y of these pins are selected as digital: the analog input still directly connects to the a/d and theref ore the pin can be used as analog input. the digital input b uff er is not disab led. the user has , theref ore , g reat e xibility in con gur ing these pins . lo w source impedance zener an y gener al pur pose op-amp (lm358, lm324, ...) v dd
AN546 ds00546e -page 10 1997 microchip technology inc. figure 13: bloc k dia gram of ra3:ra0 pins d q ck q d q ck q p n v dd d q ck analog input to a/d con v er ter data b us wr por t wr tris v ss i/o pin digital ttl input b uff er data latch tris latch rd tris rd por t current consumption thr ough input b uff er a cmos input b uff er will dr a w current when the input v oltage is near its threshold ( figure 14 ). in po w er-sensitiv e applications , the ra pins , when used as analog inputs , should be con gured as "ana- log" to a v oid unintended po w er dr ain. other consider ations and tips: 1. if possib le , a v oid an y digital output ne xt to analog inputs . 2. a v oid digital inputs that s witch frequently (e .g., cloc ks) ne xt to analog inputs . 3. if v ref is used, then ensure that no analog pin being sampled e xceeds v ref . summar y the pic16c71 a/d con v er ter is simple to use . it is v ersatile and has lo w po w er consumption. figure 14: a simple cmos input buff er v th = threshold of the in v er ter v tn = de vice threshold of nmos pull-do wn -v tp = de vice threshold of pmos pull-up i = on-current (or through current) of the in v er ter i max = maxim um on-current occurs when v in = v th . v alue of i max depends on the siz es of the de vices . the larger the de vices , the f aster the input b uff er , and the larger the v alue of i max . t ypically , i max is 0.2 ma ?1 ma. p n v out v out , i i v in p of f n of f n, p on v dd - v tp v dd v th v tn v in i v out v dd v ss
1997 microchip technology inc. ds00546e -page 11 AN546 appendix a: single c hannel a/d (sad) mpasm 01.40 released sad.asm 1-16-1997 15:22:04 page 1 loc object code line source text value 00001 ;title "single channel a/d (sad)" 00002 ;this program is a simple implementation of the pic16c71's 00003 ;a/d. 1 channel is selected (ch0). 00004 ;the a/d is configured as follows: 00005 ; vref = +5v internal. 00006 ; a/d osc. = internal rc 00007 ; a/d channel = ch0 00008 ;hardware for this program is the picdem1 board. 00009 ; 00010 ; 00011 ; program: sad.asm 00012 ; revision date: 00013 ; 1-14-97 compatibility with mpasmwin 1.40 00014 ; 00015 ; 00016 list p=16c71 00017 errorlevel -302 00018 ; 00019 include "p16c71.inc" 00001 list 00002 ;p16c71.inc standard header file, version 1.00 microchip technology 00142 list 00020 ; 00000010 00021 temp equ 10h 00000001 00022 adif equ 1 00000002 00023 adgo equ 2 00024 ; 0000 00025 org 0x00 00026 ; 00027 ; 0000 2810 00028 goto start 00029 ; 0004 00030 org 0x04 0004 281e 00031 goto service_int ;interrupt vector 00032 ; 00033 ; 0010 00034 org 0x10 0010 00035 start 0010 3000 00036 movlw b'00000000' ;set port b as 0011 0086 00037 movwf portb ;all outputs 00038 ; tris portb ; / 0012 1683 00039 bsf status, rp0 ; bank1 0013 0086 00040 movwf trisb ; portb as outputs 0014 1283 00041 bcf status, rp0 ; bank0 00042 ; 0015 201f 00043 call initializead 0016 00044 update 0016 0809 00045 movf adres,w ;get a/d value 0017 0086 00046 movwf portb ;output to port b 0018 2027 00047 call setupdelay ;setup time >= 10us. 0019 1088 00048 bcf adcon0,adif ;clear int flag 001a 1508 00049 bsf adcon0,adgo ;start new conversion 001b 00050 loop 001b 1888 00051 btfsc adcon0,adif ;a/d done? 001c 2816 00052 goto update ;yes then update new value. please chec k the microchip bbs f or the latest v ersion of the source code . microchip s w or ldwide w eb address: www .microchip .com; bulletin board suppor t: mchipbbs using compuser v e (compuser v e membership not required).
AN546 ds00546e -page 12 1997 microchip technology inc. 001d 281b 00053 goto loop ;no then keep checking 00054 ; 00055 ;no interrupts are enabled, so if the program ever reaches here, 00056 ;it should be returned with the global interrupts disabled. 001e 00057 service_int 001e 0008 00058 return ;do not enable global. 00059 ; 00060 ; 00061 ; 00062 ;initializead, initializes and sets up the a/d hardware. 00063 ;select ch0 to ch3 as analog inputs, fosc/2 and read ch3. 00064 ; 001f 00065 initializead 001f 1683 00066 bsf status,5 ;select bank1 0020 3000 00067 movlw b'00000000' ;select ch0-ch3... 0021 0088 00068 movwf adcon1 ;as analog inputs 0022 1283 00069 bcf status,5 ;select bank0 0023 30c1 00070 movlw b'11000001' ;select:rc,ch0.. 0024 0088 00071 movwf adcon0 ;turn on a/d. 0025 0189 00072 clrf adres ;clr result reg. 0026 0008 00073 return 00074 ; 00075 ;this routine is a software delay of 10us for the a/d setup. 00076 ;at 4mhz clock, the loop takes 3us, so initialize temp with 00077 ;a value of 3 to give 9us, plus the move etc should result in 00078 ;a total time of > 10us. 0027 00079 setupdelay 0027 3003 00080 movlw .3 0028 0090 00081 movwf temp 0029 00082 sd 0029 0b90 00083 decfsz temp, f 002a 2829 00084 goto sd 002b 0008 00085 return 00086 00087 00088 end memory usage map ('x' = used, '-' = unused) 0000 : x---x----------- xxxxxxxxxxxxxxxx xxxxxxxxxxxx---- ---------------- all other memory blocks unused. program memory words used: 30 program memory words free: 994 errors : 0 warnings : 0 reported, 0 suppressed messages : 0 reported, 2 suppressed
1997 microchip technology inc. ds00546e -pag e 13 AN546 appendix b : s lpad .asm mpasm 01.40 released slpad.asm 1-16-1997 15:22:32 page 1 loc object code line source text value 00001 00002 ;title "a/d in sleep mode" 00003 ;this program is a simple implementation of the pic16c71's 00004 ;a/d feature. this program demonstrates 00005 ;how to do a a/d in sleep mode on the pic16c71. 00006 ;the a/d is configured as follows: 00007 ; vref = +5v internal. 00008 ; a/d osc. = internal rc 00009 ; a/d interrupt = off 00010 ; a/d channels = ch 0 00011 ; 00012 ;the ch0 a/d result is displayed as a 8 bit binary value 00013 ;on 8 leds connected to port b. hardware used is that of 00014 ;the picdemo board. 00015 ; 00016 ; 00017 ; program: slpad.asm 00018 ; revision date: 00019 ; 1-14-97 compatibility with mpasmwin 1.40 00020 ; 00021 ; 00022 list p=16c71 00023 errorlevel -302 00024 ; 00025 include "p16c71.inc" 00001 list 00002 ;p16c71.inc standard header file, version 1.00 microchip technology 00142 list 00026 ; 00000010 00027 temp equ 10h 00000001 00028 adif equ 1 00000002 00029 adgo equ 2 00030 ; 00031 ; 0000 00032 org 0x00 00033 ; 00034 ; 0000 2810 00035 goto start 00036 ; 0004 00037 org 0x04 0004 281d 00038 goto service_int ;interrupt vector 00039 ; 00040 ; 0010 00041 org 0x10 0010 00042 start 0010 3000 00043 movlw b'00000000' ;make port b all 0011 0086 00044 movwf portb ;outputs. 00045 ; tris portb ; / 0012 1683 00046 bsf status, rp0 ; bank1 0013 0086 00047 movwf trisb ; portb as outputs 0014 1283 00048 bcf status, rp0 ; bank0 00049 ; 0015 201e 00050 call initializead 0016 00051 update please che c k the microchip bbs f or the latest v ersion of the source cod e . microchip s w o r ldwid e w eb address : ww w .microchi p .com ; bulletin board suppo r t : mchipbbs using compuse r v e (compuse r v e membership not required).
AN546 ds00546e -page 14 1997 microchip technology inc. 0016 0809 00052 movf adres,w 0017 0086 00053 movwf portb ;save in table 0018 2027 00054 call setupdelay ; 0019 1088 00055 bcf adcon0,adif ;clr a/d flag 001a 1508 00056 bsf adcon0,adgo ;start new a/d conversion 00057 ; 001b 0063 00058 sleep 001c 2816 00059 goto update ;wake up and update 00060 ; 001d 00061 service_int 001d 0008 00062 return ;do not enable int 00063 ; 00064 ;initializead, initializes and sets up the a/d hardware. 001e 00065 initializead 001e 1683 00066 bsf status,5 ;select bank1 001f 3000 00067 movlw b'00000000' ;select ch0-ch3... 0020 0088 00068 movwf adcon1 ;as analog inputs 0021 1283 00069 bcf status,5 ;select bank0 0022 30c1 00070 movlw b'11000001' ;select:internal rc, ch0. 0023 0088 00071 movwf adcon0 ;turn on a/d 0024 018b 00072 clrf intcon ;clear all interrupts 0025 170b 00073 bsf intcon,adie ;enable a/d 0026 0008 00074 return 00075 ; 00076 ;this routine is a software delay of 10us for the a/d setup. 00077 ;at 4mhz clock, the loop takes 3us, so initialize temp with 00078 ;a value of 3 to give 9us, plus the move should result in 00079 ;a total time of > 10us. 0027 00080 setupdelay 0027 3003 00081 movlw .3 0028 0090 00082 movwf temp 0029 00083 sd 0029 0b90 00084 decfsz temp, f 002a 2829 00085 goto sd 002b 0008 00086 return 00087 00088 ; 00089 00090 end memory usage map ('x' = used, '-' = unused) 0000 : x---x----------- xxxxxxxxxxxxxxxx xxxxxxxxxxxx---- ---------------- all other memory blocks unused. program memory words used: 30 program memory words free: 994 errors : 0 warnings : 0 reported, 0 suppressed messages : 0 reported, 2 suppressed
1997 microchip technology inc. ds00546e -pag e 15 AN546 appendix c : inta d.a sm mpasm 01.40 released intad.asm 1-16-1997 15:21:10 page 1 loc object code line source text value 00001 00002 ;title "single channel a/d with interrupts" 00003 ;this program is a simple implementation of the pic16c71's 00004 ;a/d. 1 channel is selected (ch0). a/d interrupt is turned on, 00005 ;hence on completion of a/d conversion, an interrupt is generated. 00006 ;the a/d is configured as follows: 00007 ; vref = +5v internal. 00008 ; a/d osc. = internal rc osc. 00009 ; a/d interrupt = on 00010 ; a/d channel = ch0 00011 ; 00012 ;the a/d result is displayed as a 8 bit value on 8 leds connected 00013 ;to port b. hardware setup is the picdemo board. 00014 ; 00015 ; 00016 ; program: intad.asm 00017 ; revision date: 00018 ; 1-14-97 compatibility with mpasmwin 1.40 00019 ; 00020 ; 00021 list p=16c71 00022 errorlevel -302 00023 ; 00024 include "p16c71.inc" 00001 list 00002 ; p16c71.inc standard header file, version 1.00 microchip technology 00142 list 00025 ; 00000010 00026 flag equ 10 00000011 00027 temp equ 11 00000000 00028 adover equ 0 00000001 00029 adif equ 1 00000002 00030 adgo equ 2 00000006 00031 adie equ 6 00000007 00032 gie equ 7 00000005 00033 rp0 equ 5 00034 ; 0000 00035 org 0x00 00036 ; 00037 ; 0000 2810 00038 goto start 00039 ; 0004 00040 org 0x04 0004 281e 00041 goto service_ad ;interrupt vector 00042 ; 00043 ; 0010 00044 org 0x10 0010 00045 start 0010 3000 00046 movlw b'00000000' ;init i/o ports 0011 0086 00047 movwf portb 00048 ; tris portb 0012 1683 00049 bsf status, rp0 ; bank1 0013 0086 00050 movwf trisb ; portb as outputs 0014 1283 00051 bcf status, rp0 ; bank0 00052 ; please che c k the microchip bbs f or the latest v ersion of the source cod e . microchip s w o r ldwid e w eb address : ww w .microchi p .com ; bulletin board suppo r t : mchipbbs using compuse r v e (compuse r v e membership not required).
AN546 ds00546e -page 16 1997 microchip technology inc. 0015 2024 00053 call initializead 0016 00054 update 0016 1010 00055 bcf flag,adover ;reset software a/d flag 0017 202d 00056 call setupdelay ;setup delay >= 10us. 0018 1088 00057 bcf adcon0,adif ;reset a/d int flag (adif) 0019 1508 00058 bsf adcon0,adgo ;start new a/d conversion 001a 178b 00059 bsf intcon,gie ;enable global interrupt 001b 00060 loop 001b 1810 00061 btfsc flag,adover ;a/d over? 001c 2816 00062 goto update ;yes start new conv. 001d 281b 00063 goto loop ;no then keep checking 00064 ; 001e 00065 service_ad 001e 1c88 00066 btfss adcon0,adif ;ad interrupt? 001f 0009 00067 retfie ;no then ignore 0020 0809 00068 movf adres,w ;get a/d value 0021 0086 00069 movwf portb ;output to port b 0022 1410 00070 bsf flag,adover ;a/d done set 0023 0008 00071 return ;do not enable int 00072 ; 00073 ; 00074 ;initializead, initializes and sets up the a/d hardware. 00075 ;select ch0 to ch3, rc osc., a/d interrupt. 0024 00076 initializead 0024 1683 00077 bsf status,rp0 ;select bank1 0025 3000 00078 movlw b'00000000' ;select ch0-ch3... 0026 0088 00079 movwf adcon1 ;as analog inputs 0027 1283 00080 bcf status,rp0 ;select bank0 0028 018b 00081 clrf intcon ;clr all interrupts 0029 170b 00082 bsf intcon,adie ;enable a/d int. 002a 30c1 00083 movlw b'11000001' ;select:rc osc,ch0... 002b 0088 00084 movwf adcon0 ;turn on a/d 002c 0008 00085 return 00086 ; 00087 ;this routine is a software delay of 10us for the a/d setup. 00088 ;at 4mhz clock, the loop takes 3us, so initialize temp with 00089 ;a value of 3 to give 9us, plus the move should result in 00090 ;a total time of > 10us. 002d 00091 setupdelay 002d 3003 00092 movlw .3 002e 0091 00093 movwf temp 002f 00094 sd 002f 0b91 00095 decfsz temp, f 0030 282f 00096 goto sd 0031 0008 00097 return 00098 ; 00099 ; 00100 end memory usage map ('x' = used, '-' = unused) 0000 : x---x----------- xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xx-------------- all other memory blocks unused. program memory words used: 36 program memory words free: 988 errors : 0 warnings : 0 reported, 0 suppressed messages : 0 reported, 2 suppressed
1997 microchip technology inc. ds00546e -pag e 17 AN546 appendix d : mult ad. as m mpasm 01.40 released multad.asm 1-16-1997 15:21:41 page 1 loc object code line source text value 00001 ;title "a/d using multiple channels" 00002 ;this program is a simple implementation of the pic16c71's 00003 ;a/d feature. this program demonstrates 00004 ;how to select multiple channels on the pic16c71. 00005 ;the a/d is configured as follows: 00006 ; vref = +5v internal. 00007 ; a/d osc. = internal rc osc. 00008 ; a/d interrupt = off 00009 ; a/d channels = all in a "round robin" format. 00010 ; a/d reuslts are stored in ram locations as follows: 00011 ; ch0 --> adtable + 0 00012 ; ch1 --> adtable + 1 00013 ; ch2 --> adtable + 2 00014 ; ch3 --> adtable + 3 00015 ; 00016 ;the ch0 a/d result is displayed as a 8 bit value on 8 leds 00017 ;connected to port b. 00018 ;hardware: picdemo board. 00019 ; stan d'souza 7/6/93. 00020 ; 00021 ; program: multad.asm 00022 ; revision date: 00023 ; 1-14-97 compatibility with mpasmwin 1.40 00024 ; 00025 ; 00026 list p=16c71 00027 errorlevel -302 00028 ; 00029 include "p16c71.inc" 00001 list 00002 ;p16c71.inc standard header file, version 1.00 microchip technology 00142 list 00030 ; 00000010 00031 temp equ 10h 00000001 00032 adif equ 1 00000002 00033 adgo equ 2 00034 ; 00000006 00035 ch2 equ 6 00000007 00036 ch3 equ 7 0000000c 00037 flag equ 0c 00000020 00038 adtable equ 20 00039 ; 0000 00040 org 0x00 00041 ; 00042 ; 0000 2810 00043 goto start 00044 ; 0004 00045 org 0x04 0004 2825 00046 goto service_int ;interrupt vector 00047 ; 00048 ; 0010 00049 org 0x10 0010 00050 start 0010 3000 00051 movlw b'00000000' ;make port b please che c k the microchip bbs f or the latest v ersion of the source cod e . microchip s w o r ldwid e w eb address : ww w .microchi p .com ; bulletin board suppo r t : mchipbbs using compuse r v e (compuse r v e membership not required).
AN546 ds00546e -page 18 1997 microchip technology inc. 0011 0086 00052 movwf portb ;as all outputs 00053 ; tris portb ; / 0012 1683 00054 bsf status, rp0 ; bank1 0013 0086 00055 movwf trisb ; portb as outputs 0014 1283 00056 bcf status, rp0 ; bank0 00057 ; 0015 2026 00058 call initializead 0016 00059 update 0016 0809 00060 movf adres,w 0017 0080 00061 movwf 0 ;save in table 0018 3020 00062 movlw adtable ;chk if ch0 0019 0204 00063 subwf fsr,w ; / 001a 1d03 00064 btfss status,z ;yes then skip 001b 281e 00065 goto nextad ;else do next channel 001c 0809 00066 movf adres,w ;get a/d value 001d 0086 00067 movwf portb ;output to port b 001e 00068 nextad 001e 2030 00069 call nextchannel ;select next channel 001f 203c 00070 call setupdelay ;set up > = 10us 0020 1088 00071 bcf adcon0,adif ;clear flag 0021 1508 00072 bsf adcon0,adgo ;start new a/d conversion 0022 00073 loop 0022 1888 00074 btfsc adcon0,adif ;a/d done? 0023 2816 00075 goto update ;yes then update 0024 2822 00076 goto loop ;wait till done 00077 ; 0025 00078 service_int 0025 0008 00079 return ;do not enable int 00080 ; 00081 ; 00082 ;initializead, initializes and sets up the a/d hardware. 0026 00083 initializead 0026 1683 00084 bsf status,5 ;select pg1 0027 3000 00085 movlw b'00000000' ;select ch0-ch3... 0028 0088 00086 movwf adcon1 ;as analog inputs 0029 1283 00087 bcf status,5 ;select pg0 002a 30c1 00088 movlw b'11000001' ;select:fosc/2, ch0. 002b 0088 00089 movwf adcon0 ;turn on a/d 002c 3020 00090 movlw adtable ;get top of table address 002d 0084 00091 movwf fsr ;load into indirect reg 002e 0189 00092 clrf adres ;clr result reg. 002f 0008 00093 return 00094 ; 00095 ;nextchannel, selects the next channel to be sampled in a 00096 ;"round-robin" format. 0030 00097 nextchannel 0030 3008 00098 movlw 0x08 ;get channel offset 0031 0788 00099 addwf adcon0, f ;add to conf. reg. 0032 1288 00100 bcf adcon0,5 ;clear any carry over 00101 ;increment pointer to correct a/d result register 0033 0190 00102 clrf temp 0034 1988 00103 btfsc adcon0,3 ;test lsb of chnl select 0035 1410 00104 bsf temp,0 ;set if ch1 or ch3 0036 1a08 00105 btfsc adcon0,4 ;test msb of chnl select 0037 1490 00106 bsf temp,1 ;set if ch0 or ch2 0038 3020 00107 movlw adtable ;get top of table 0039 0710 00108 addwf temp,w ;add with temp 003a 0084 00109 movwf fsr ;allocate new address 003b 0008 00110 return 00111 ; 00112 ;this routine is a software delay of 10us for the a/d setup. 00113 ;at 4mhz clock, the loop takes 3us, so initialize temp with 00114 ;a value of 3 to give 9us, plus the move etc should result in 00115 ;a total time of > 10us. 003c 00116 setupdelay 003c 3003 00117 movlw .3
1997 microchip technology inc. ds00546e -page 19 AN546 003d 0090 00118 movwf temp 003e 00119 sd 003e 0b90 00120 decfsz temp, f 003f 283e 00121 goto sd 0040 0008 00122 return 00123 00124 ; 00125 00126 end memory usage map ('x' = used, '-' = unused) 0000 : x---x----------- xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0040 : x--------------- ---------------- ---------------- ---------------- all other memory blocks unused. program memory words used: 51 program memory words free: 973 errors : 0 warnings : 0 reported, 0 suppressed messages : 0 reported, 2 suppressed
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